The subject invention finds use in a high performance data processing system which functions in accordance with the requirements of IBM System/370 data processing systems as defined by the "System/370 Principles of Operation" Form No. GA22-7000. These data processing systems provide sixteen instruction-addressable general registers. The general registers may be loaded with data for temporary storage, or data stored in the general registers may be utilized for address formulation, which includes utilizing the contents as a base address or address indexing value to be added to address information contained in instructions to be executed.
The above referred to related patent application describes a high-performance data processing system following the IBM System/370 Principles of Operations, and discloses an instruction preprocessing unit which is capable of stacking, or queueing, predecoded instructions to be sequentially transferred to an execution unit for execution, one at a time. In view of the fact that an instruction awaiting execution in the instruction queue may designate a general register to receive new data further decoding of an instruction in an instruction register must be prevented when that instruction requires the use of the same general register for formulating a main storage address.
In the above defined IBM System/370, there are several types of instructions that modify general register contents. All of these define a general register by a field labeled "R1" which identifies the register to be loaded into. The data to be loaded into register R1 may come from another general register, a main storage address location, or from the output of an arithmetic unit. Certain instructions which specify R1 may also imply that the general register R1+1 is also to be loaded.
Some load instructions specify that a plurality of main storage locations are to be accessed and loaded into general registers starting with register R1 and ending with a general register identified by another field in the instruction called R3. This particular instruction is identified as LOAD MULTIPLE.